VCA-CON-101: Virtus Console: Retro Cores & Homebrew

Course Overview

CSA-101 builds a CPU from NAND gates upward. CON-101 takes the same FPGA methodology downward. Instead of the smallest possible RISC-V on the smallest possible Tang Nano, students inherit the open-source retro-computing community's much larger soft cores (NES PPU + APU; Game Boy LR35902 with MBC mapping; SNES 65C816 + S-PPU + S-DSP) running on a Cyclone V (DE10-Nano) under the MiSTer framework. CON-101 is the chapter where the student watches a CPU they personally synthesised play Tetris, Super Mario Bros, or their own homebrew ROM.

The pedagogical move is the inverse of CSA-101's. CSA-101 said: build the smallest layer that earns its keep. CON-101 says: study layers other people built, understand what they chose, modify them, and stand on the shoulders. The 6502 historical anchor, the processor that powered the Apple II, Commodore 64, NES, BBC Micro, and Atari 2600. Is revisited in detail; CSA-101's Ch 4 named it as the canonical 8-bit ISA the student should be able to read; CON-101 has the student writing 6502 assembly and watching it execute on synthesised silicon.

Position relative to peer offerings. The MiSTer project (open source, ~2017-present) is the production-grade hub for FPGA-based retro emulation; commercial offerings (Analogue Pocket / Super NT / Mega SG) deliver finished hardware but expose no soft-core source. CON-101 is the first formal curriculum in the academy curriculum that teaches students to read and modify MiSTer cores rather than treat them as black boxes, the same pattern CSA-101 applied to RV32I-Lite, scaled to canonical retro silicon.

The ANALYZE-not-copy rule. CON-101 students do not copy the MiSTer / Hugg / open-source-community work; they analyze it. The pedagogical thesis is that a student who reads someone else's Verilog and can describe, chapter-by-chapter, what design choices the author made and why, is closer to the practitioner approach than a student who clones the repo and changes a parameter. Every CON-101 module that touches a community core opens with the question "what choice did this author make, and what was the alternative?" before any keyboard-on-ROM work begins.

Pedagogy. CON-101 follows CSA-101's three teaching habits with track-specific source texts. Foundational readings (~10-14 weaves across the 10 modules; ~200-300 words each) draw from a paired-textbook system: Steven Hugg, Designing Video Game Hardware in Verilog (Puzzling Plans 2018) + Hugg's 8bitworkshop.com interactive in-browser IDE for the build-it-yourself axis (single-author tool/text alignment is unusual at academy scale and is what makes Hugg the canonical CON-track build anchor); and Rodrigo Copetti, "Architecture of Consoles" series (FREE at copetti.org) + Bogost & Montfort, Racing the Beam: The Atari Video Computer System (MIT Press 2009; Atari 2600 Platform Studies) + Altice, I Am Error: The Nintendo Family Computer/Entertainment System Platform (MIT Press 2015; NES Platform Studies) for the down-to-earth narrative axis (TRIPLE-paired because Copetti covers the breadth, Bogost & Montfort go deep on Atari 2600, Altice goes deep on NES). Tool Journal entries enter for each new tool (per first-introduce-track-ownership rule, CON-track owns canonical introductions for the 6502 / Z80 assembler families, GBDK + PVSneslib, 8bitworkshop, MAME source, MiSTer, nesdev.org / SNESdev community resources). Compare and Contrast pairs NES, Game Boy, and SNES against the SB6141, the Apple M-series, and the Tang Primer 25K CSA-101 baseline, the cousin-mapping discipline applied to retro silicon.

How the Course Teaches: Foundational Readings

The Petzold readings that thread CSA-101's computing-systems prose are CSA-only by design. CON-101's equivalent is a paired-textbook system drawn from the canonical literature of the retro-console-architecture and homebrew-development disciplines. The Hugg + 8bitworkshop pairing is the rare single-author tool/text alignment in academy curriculum: Hugg's book walks the reader through building real game hardware in Verilog; Hugg's 8bitworkshop.com IDE lets the reader run those designs in the browser. Same author, same pedagogy, two delivery formats.

The narrative-side TRIPLE pairing (Copetti + Bogost+Montfort + Altice) is structural. Copetti's per-console Architecture-of-Consoles writeups (FREE at copetti.org; ~30 console architectures covered, regularly updated through 2025) supply the breadth: NES, Game Boy, SNES, Master System, Genesis, PC Engine, Saturn, PlayStation, N64, Dreamcast, GBA, DS, Wii, etc. Bogost & Montfort's Racing the Beam (the founding book of MIT Press's Platform Studies series) goes deep on the Atari 2600 specifically. Reading the architecture from the perspective of what games for it actually had to do. Altice's I Am Error is the NES-specific successor in the Platform Studies tradition; the title is a famous Zelda II translation glitch.

Sample weave (Hugg, Designing Video Game Hardware in Verilog, intro). Hugg's text walks the reader through building a complete video-game system from scratch in synthesizable Verilog. Not a stylized academic exercise, but a working NTSC video output, a sound generator, controller input, and a CPU that runs game logic on real FPGA silicon. The pedagogical insight in CON-101 is that this isn't a CPU course (CSA-101 already built one); it's a system-architecture course where the CPU is one subsystem among several, and the interesting questions are at the seams (when does the CPU read the controller; when does the video generator latch the framebuffer; how do the audio and video clocks share a master oscillator). Once a student has read Hugg's pong-then-galaga progression, the ANALYZE-not-copy work against community NES cores stops reading as mysterious-Verilog-stuff and starts reading as a system with a particular interface. The 8bitworkshop.com mirror in the academy workbench runs Hugg's designs in the browser; Module 1 has students load the canonical "Pong" design and step it frame-by-frame.

Sample weave (Bogost & Montfort, Racing the Beam, Ch 1, Stella). Bogost and Montfort document, in the opening chapters of Racing the Beam, that the Atari 2600's Television Interface Adapter (the "Stella" chip) had no frame buffer, the CPU had to write the next scanline's pixels to the chip during the scanline before, racing the cathode-ray-tube's electron beam line by line. The consequence was that every Atari 2600 game's code structure was dictated by the timing of the television signal itself; the "game loop" was literally one trip around the screen. The key point in CON-101 is that hardware architecture choices are not neutral; they constrain what software is possible to write, and a student who reads a community Atari core's Verilog without this framing will not understand why the code is shaped the way it is. Module 9 (cousin-mapping retro vs modern) returns to this framing when comparing the Atari 2600's no-framebuffer architecture against the NES's tile-and-sprite PPU.

The full per-chapter weave catalog publishes as handouts/cross-chapter-con-track-anchor-reading-guide.md. Hugg's Making 8-Bit Arcade Games in C (companion volume) supplements Module 7 (homebrew ROM development); the Copetti Architecture-of-Consoles per-console writeups are linked one-to-one with the NES / Game Boy / SNES modules.

Curriculum Outline

Ten modules across ~10 weeks. Each module is a working artefact.

Learning Outcomes

step-by-step.

1. Remember. State the 6502 register set, addressing modes, and the canonical instruction encoding.
2. Understand. Explain why memory-mapped I/O is the dominant pattern for retro consoles, and why the MMC mappers existed.
3. Apply. Hand-write 6502 assembly, assemble it with cc65, and run it on a synthesised NES core.
4. Apply. Read the open-source NES PPU and APU HDL; modify a small parameter (palette, audio mix); observe the change.
5. Apply. Implement an MMC1-class cartridge mapper variant and verify a bank-switched ROM.
6. Analyze. Compare NES, Game Boy, and SNES architectures via a structured Compare and Contrast, ISA / memory map / video / audio / mapper conventions.
7. Synthesize. Write or port an original homebrew ROM to a modified soft core running on the student's DE10-Nano.

Hands-On Labs

Each module produces a versioned artefact. The capstone is an original homebrew ROM running on a soft core the student modified.

• Lab 1.1: stock NES core boots; Donkey Kong playable on student silicon.
• Lab 2.1: hand-written 6502 assembly (a tiny screen-fill program) runs on the NES core.
• Lab 3.1: NES palette modification observed visually on HDMI.
• Lab 4.1: MMC1-variant mapper passes ROM-loading test.
• Lab 5.1: Game Boy core trace identifies LR35902-vs-Z80 instruction differences.
• Lab 6.1: SNES vs NES Compare and Contrast drafted.
• Lab 7.1: original homebrew ROM (sprite + tile-map + score-display + input).
• Lab 8.1: HDMI output path traced from frame buffer to monitor.
• Lab 9.1: NES ↔ SB6141 cousin-mapping diagram for the RE-101 forward-pointer.
• Lab 10 (capstone): final homebrew ROM + modified-core branch + 5-minute demo.

Assessment

First, your project must work. the capstone homebrew ROM runs on the student's modified core on the DE10-Nano; the modification is non-trivial; the demo shows the artefact running for 60+ seconds with HDMI video and audio. Then we score the report on three dimensions (40/30/30). modification depth (40%) · engineering discipline / reproducibility (30%) · demo and report quality (30%). B− minimum on Tier 2 for the certificate.

Career Outcomes & Cross-Course Bridges

• → VCA-CSA-201 (downstream-from CON; CON DOWNSTREAM-FROM-CSA inheritance). CON-101 inherits the FPGA toolchain (iverilog / yosys / nextpnr / apicula) and the Tang Primer 25K canonical hardware from CSA-101; graduates with both courses can move bidirectionally between custom-CPU work (CSA) and community-core analysis (CON).
• → VCA-RE-101. Reading other people's HDL is the same skill as reading other people's firmware. CON-101 graduates land RE-101's SB6141 binary-analysis lab having already reverse-engineered NES + Game Boy + SNES core HDL with the analyze-and-modify discipline.
• → VCA-RF-201 + VCA-RF-301. The Tang Primer 25K substrate carries forward; FPGA-side SDR work in RF-201/301 is a natural extension of CON-101's HDL-reading discipline.
• → VCA-EMB-201 (future, planned). Embedded soft-core development at production scale.
• → VCA-RE-201. Cousin-mapping methodology applied to RF protocols.
• Industry. FPGA design engineers; retro-game preservation engineering at studios and academic archives; embedded video/audio firmware engineers; MiSTer-ecosystem core authors; MAME contributors; Analogue / Polymega / Hyperkin hardware engineering.

Tool Journal: CON-101 Originating Entries

Per the academy's first-introduce-track-ownership rule, CON-101 is the canonical originating course for the retro-console homebrew tool corpus. Subsequent courses reference rather than re-introduce these entries; the FPGA toolchain (iverilog / yosys / nextpnr / apicula) is canonically introduced in CSA-101 and continues here.

• 8bitworkshop.com (in-browser IDE), Hugg's interactive in-browser IDE; runs in the academy workbench via an academy mirror. The single-author tool/text alignment with Hugg's book makes this the canonical CON-track build companion.
• cc65 (6502 cross-compiler suite), the open-source 6502 toolchain (ca65 assembler, cc65 compiler, ld65 linker); canonical first-introduce here per cross-track-toolchain-roster.
• sjasmplus / asmsx (Z80 assemblers). Canonical Z80 toolchain for TI-calc and MSX cross-cut.
• GBDK (Game Boy Development Kit), the canonical Game Boy homebrew toolchain.
• PVSneslib, the canonical SNES homebrew library.
• MAME source, the canonical multi-arcade-machine emulator codebase; ANALYZE-target for community-emulator architecture study. The academy ships an in-browser MAME wrap (web-playable port) for hands-on playback of authorised ROMs through the workbench.
• MiSTer FPGA framework, the open-source FPGA-emulation framework hosting NES / Game Boy / SNES soft cores; ANALYZE-target for production-grade core archives; advanced-track external (DE10-Nano hardware required). Cross-cuts to CSA-201's Cyclone V module.
• nesdev.org / SNESdev / GBdev community resources, the canonical homebrew-development knowledge bases for each platform; canonical first-introduce here.
• Mesen, the open-source NES emulator with deep debugger; pre-FPGA verification.
• BGB / SameBoy, Game Boy emulators with cycle-accurate debugger.
• bsnes-plus, the SNES emulator with debugger; pre-FPGA SNES verification.
• NES ROM-extractor / iNES header tooling, ROM-format introspection.
• Game Boy ROM-mapper extractor, ROM-format introspection for LR35902 carts.
• yowasp Tang FPGA synth (Tab 3), LIVE in the academy workbench on both Tang Nano 20K and Tang Primer 25K; full bitstream synthesis in the browser before flashing.
• SD-card image-mounter, the MiSTer ROM-loader (advanced-track).

Recommended Readings & Practitioner Companions

Primary anchor pair (build-it-yourself; single-author tool/text alignment)

• Steven Hugg, Designing Video Game Hardware in Verilog. Puzzling Plans, 2018 (ISBN 978-1-9794-1368-5). The CON-track build-it-yourself anchor; canonical Verilog-from-scratch retro-console-design textbook. Library-acquire or paperback ~$30.
• Steven Hugg, Making 8-Bit Arcade Games in C. Puzzling Plans. Companion volume for Module 7 homebrew ROM development.
• 8bitworkshop.com, Hugg's interactive in-browser IDE; FREE; also runs in the academy workbench via an academy mirror.

Primary anchor TRIPLE pairing (down-to-earth narrative)

• Rodrigo Copetti, "Architecture of Consoles" series. FREE at copetti.org. ~30 console architectures covered, regularly updated through 2025; the breadth-companion of the TRIPLE pairing.
• Ian Bogost & Nick Montfort, Racing the Beam: The Atari Video Computer System. MIT Press, 2009 (ISBN 978-0-262-01257-7). The founding book of MIT Press's Platform Studies series; the Atari-2600-specific deep-dive of the TRIPLE pairing.
• Nathan Altice, I Am Error: The Nintendo Family Computer/Entertainment System Platform. MIT Press, 2015 (ISBN 978-0-262-02877-6). The NES-specific deep-dive of the TRIPLE pairing; title is a famous Zelda II translation glitch.

Secondary anchors (supplementary)

• Robert Nystrom, Game Programming Patterns. FREE online at gameprogrammingpatterns.com. Architecture patterns for game-engine code at the design-pattern register.
• Modern MIT Press Platform Studies series. Volumes on Wii (Jones & Thiruvathukal), PlayStation, Atari ST, Sega Genesis (Altice + others), Game Boy (Stuckey & Carr) for students wanting platform-specific deep-dives beyond NES + Atari.

Before You Start

Five yes/no self-checks. If any is "no," the remediation pointer is the next step.

1. Have you completed CSA-101 and shipped its capstone? (If no → complete CSA-101 first; CON-101's HDL-reading discipline assumes CSA-101's NAND-up build.)
2. Can you read a circuit diagram and a Verilog waveform? (If no → CSA-101 §1.7 Virtus HDL simulator + Ch 5 Yosys waveform discipline.)
3. Have you used a console controller (NES, SNES, Game Boy)? (If no → play Super Mario Bros for an hour. Seriously. The pedagogy assumes you have a player's relationship to the artefact.)
4. Are you comfortable installing closed-source tooling (Quartus Prime Lite)? (If no → CSA-201's prereq map includes the Quartus install discipline.)
5. Do you have ~$200 for the DE10-Nano + MiSTer add-on board + game controller? (If no → HW-101's parts list + cohort-shared bench access; some Academy chapters share a DE10-Nano kit. Controller note: the academy kit ships DualShock 2 controllers; the curriculum uses the standard 12-button gamepad mapping by default, with the analog sticks + analog button pressure exposed in forward-stretch labs. Students who already own a SNES-compatible USB gamepad can use it instead, the 8-button SNES button-set is a subset of the DS2 controllers, and the curriculum was originally scoped against the SNES baseline before being upgraded to DS2.)

Format Prescriptions

Hour budget: ~20 lec hr + ~40 lab hr + ~60 indep hr (= ~120 hr total).

Live (standard cadence)

2 sessions/wk × 90 min over 10 weeks. Best for college-elective or post-CSA-101 cohort cadence.

Night class

1-2 sessions/wk evenings; ~22 weeks. Quartus install + DE10-Nano flash sessions need extended evening blocks.

Bootcamp

40 hr/wk × 3 weeks intensive. Feasible because much of the "reading other people's HDL" is asynchronous.

Async self-paced

Recorded video + per-student DE10-Nano kit. AI-assistant tier add-on. 1:1 tutoring premium tier for 6502 assembly + Quartus debugging.

High school / homeschool co-op

Adapted live cadence over a semester. Pairs naturally with a parallel CSA-201 track.

Interested in VCA-CON-101?

Email interested@virtuscyberacademy.org with your background and interest.

Email interested@virtuscyberacademy.org