Virtus Academy: Hardware Platform

The platform, Tang Primer 25K Validated

The Tang Primer 25K is a Sipeed-built FPGA development board powered by a Gowin GW5A-LV25MG121C1/I0. Sipeed sells the board direct on AliExpress at $19 module-only and $29 with the Dock carrier; that is the canonical sourcing channel. Verified spec table:

A Marketing-to-curriculum translation note: some retail listings describe a "MIPI 2.5 Gbps Ethernet PMOD Port," conflating the MIPI D-PHY camera/display interface with ethernet. They are distinct standards. The Tang Primer 25K does not ship with on-board ethernet; the academy's networking labs depend on the ENC28J60 SPI module (a $6 add-on, listed in the BoM below), with the TCP/IP stack itself authored as a CSA-201-tier engineering exercise.

The starter kit: ~$75

The starter kit covers the foundations courses (FND-101 + FND-102), the first half of our build flagship (CSA-101 Modules 1-5), and the early lectures of HW-101 / NET-101 / SEC-101. Students who begin in-browser and later decide to take a hardware course graduate to this kit without re-buying anything, every starter-kit component carries forward into the full kit.

The browser-only path opens the first half of CSA-101 (Modules 1-4) and the entirety of FND-101 + FND-102 + the early SEC-101 / NET-101 / HW-101 lectures to students who want to start on a laptop while their kit ships. The same lessons run in your browser through the academy workbench. Module 5 (the silicon bring-up, where students program their own CPU onto the board) is the first graded checkpoint that needs either the hardware kit or the workbench emulator, so the kit-vs-browser decision can wait until the student reaches that point.

Full per-student kit: what's in the box

One kit per student, sourced through Sipeed-direct (the FPGA board) plus standard distributor channels (sensors and discrete components). The list below adds the parts students need for the deeper hands-on labs (Ethernet, ADC, level-shifter, the discrete logic chips for the Lab 1.0 / 2.0 build-an-adder exercises) on top of the starter kit above. Older drafts of the curriculum bundled commercial gear (Arduino R4 WiFi, soldering kit, separate Saleae logic analyzer / FT232H / CP2102 USB-serial bridges); we replaced those with FPGA-resident tools the student authors as part of the curriculum - building the tool is the lesson.

Dropped from the previous BoM (now built-it-yourself on FPGA, see roster below): Arduino R4 WiFi; soldering bundle; FT232H + Saleae Logic + CP2102 dual-use trio (each replicated by an FPGA-resident tool the student authors as part of the curriculum). Net per-student saving versus the previous bundle: meaningful, while shifting spend from black-box gear toward components the student can reason about end-to-end.

The workbench, the curriculum in your tab Validated

The academy workbench ships the full CSA-101 toolchain as a three-tab page that runs entirely in your browser - nothing to install. It powers the browser-only path (compile, emulate, and synthesize a CPU before your kit even arrives) and serves as the pre-flash check for kit-based students. As of 2026-05-02 all three tabs are LIVE for both Tang boards.

Build before we offer

We have a standing rule: nothing shows up in a student lab until we've built it ourselves and run it through a real classroom-style test. That rule applies to every line on this page. Here's what each status tag means in plain English:

• Validated. We checked it against the vendor docs and a working bench. The Tang Primer 25K spec (23K LUT4 / 1,008 Kbit RAM / 6 clock generators) is verified against the Sipeed wiki and the Gowin chip datasheet.
• Shipped-in-course. It's running in an actual lab with student worksheets and a teaching plan you can read.
• In-build. We're building it right now. There's a tracked hand-off plan back into the curriculum.
• Researched. We've written it up: parts list, effort estimate, license review, plan to get it to students. No lab yet, but it's next on the workbench.

We show all four states publicly so you can see what we're building, what we've built, and what's coming. We'd rather be honest about the build than pretend the program is finished. Especially when we'd like you to come build it alongside us.

Multi-ISA roadmap

CSA-101's RV32I-Lite anchors the platform; downstream courses extend the same FPGA into additional ISAs so students can compare what changes and what does not when an instruction set evolves. The current roadmap is RV32I first, MIPS-I sister core next, and ARM/x86 deferred until the first two pairs are demonstrably teachable.

Build-it-yourself tool roster

Where a commercial product (Saleae logic analyzer, JTAGulator, Bus Pirate) would normally appear in a curriculum BoM, Virtus instead asks the student to build the equivalent on the FPGA they already own. Two reasons: (a) the tool's already paid for, the FPGA is in the kit; (b) building the tool is the lesson. Reverse engineers and embedded-security practitioners win on understanding internals; black-box dependencies are a comprehension gap, not a feature.

Labs already running

Two hands-on TTL discrete-logic labs are already running in classroom form, with student worksheets, parts lists, and the Petzold + HMC E85 source material verified line-by-line. They come before any FPGA work, and they live at the most important moment in the curriculum: the bridge between "a transistor turned on" and "your program ran."

Pedagogical lineage

The academy's hardware-and-tools curriculum stands on three named lineages. The combination is deliberate; each contributes a different central thread.

• Harvey Mudd College E85. The HMC E85 lab kit (DIP switches, 74HC discrete TTL, breadboard) anchors Lab 1.0 and Lab 2.0 with no soldering required. Students who finish the discrete-logic labs walk into the FPGA chapters knowing what each gate actually does in silicon. Not just what its truth table says.
• Nand2Tetris (Nisan & Schocken). CSA-101 follows the forward-construction arc of The Elements of Computing Systems, NAND → ALU → CPU → assembler → VM → compiler → OS → running application, with Virtus-original tooling so students complete every project end-to-end on hardware they keep.
• Charles Petzold's CODE. Short essays drawn from specific Petzold chapters thread through every CSA-101 chapter. Petzold's flashlight → relay → switching circuit → full-computer arc gives you a physical-intuition spine the formal nand2tetris machinery hangs off of.

None of the three is being copied wholesale. What we add is the combination: the discrete-logic build (HMC), the forward-construction theory (nand2tetris), Petzold's physical-intuition essays, and an FPGA-based tool roster you personally author. No other program at this level pairs all four.

What the status tags mean

Every colored tag on this page resolves to one of four simple states.

• Shipped-in-Course  Running in a real lab with student worksheets and a teaching plan you can read.
• Validated  We checked it against vendor docs and a working bench. Ready for student use.
• In-Build  Active build right now. Closing back into the curriculum next.
• Researched  Parts list + effort estimate + license review written up. Lab is queued, not yet built.

Want to follow the build?

Email interested@virtuscyberacademy.org with a sentence about what you'd want from the program. We'll fold demand signal into which tool ships next. Per-cohort updates to this page accompany every published kit-BoM revision.

Back to course catalog Email interested@virtuscyberacademy.org